add custom instructions for gcc & gasby jfo, jfojfo@gmail.com
Recently I have been working with SimpleScalar——a computer architecture simulator running its own
instruction set. For more info please ref http://www.simplescalar.com/, and SimpleScalar v4 can be found
here http://www.simplescalar.com/v4test.html.
In this article I’ll introduce how to add your own instructions to gcc & gas.
My work was based on ss(Simple Scalar?) instruction set, which is MIPS-like, but with its own extensions.
you can define new instructions for simplescalar to simulate by adding your own DEFINST(…) to
machine definition file machine.def, which is a symbol link to "target-pisa/pisa.def".
Now let’s talk about our own instructions.
add2 rs, rt ; rs = rs + rt
sub2 rs, rt ; rs = rs – rt
note: the figure above is for MIPS, but the principle is the same.
a. Adding new instructions to gcc
gcc-2.7.2.3/config/ss/ss.md
First remove the original ADDITION & SUBSTRACTION part definition.
The following is my new definition for add2, others are omitted(sub2, subi2, adddi2 …).
(match_operand:SI 0 "register_operand" "=d")
SI: SImode, see gcc-2.7.2.3/machmode.def
0: operand number 0, the first operand
"register_operand": the predicate, means this operand will be verified by a function register_operand()
"=d" or "=r": "=" means this is the output operand, "r" means a register, "d" is defined by ss itself.
"0" means this is the same operand as operand 0. Different from (mach_dup …)
see gcc-2.7.2.3/config/ss/ss.h, line 1402
Please ref gcc internals http://www.cse.iitb.ac.in/~uday/gcc-workshop/gccint/Patterns.html#Patterns for
more detailed explanations for define_insn & define_expand.
The following files is used at build time(ref http://www.cfdvs.iitb.ac.in/~amv/gcc-int-docs/html/gcc-conceptual-structure.html) to generate machine depend files.
gcc-2.7.2.3/gencodes.c
generate insn-codes.h:
gcc-2.7.2.3/genconfig.c
generate insn-config.h:
gcc-2.7.2.3/genemit.c
generate insn-emit.c:
Similarly genrecog.c, genflags.c and genopinit.c will generate insn-recog.c, insn-flags.h and insn-opinit.c
gcc-2.7.2.3/genoutput.c
generate insn-output.c:
b. Adding new instructions to gas
simpleutils-990811/opcodes/ss-opc.c
binutils simpleutils-990811/include/opcode/ss.h line 32
The ‘i’ format uses OP, RS, RT and IMMEDIATE.
The ‘j’ format uses OP and TARGET.
The ‘r’ format uses OP, RS, RT, RD, SHAMT and FUNCT.
The ‘b’ format uses OP, RS, RT and DELTA.
The floating point ‘i’ format uses OP, RS, RT and IMMEDIATE.
The floating point ‘r’ format uses OP, FMT, FT, FS, FD and FUNCT.
"v" 5 bit same register used as both source and destination (OP_*_RS)